music notes

This commit is contained in:
2025-11-12 21:09:31 +00:00
parent 546a72ff81
commit 3b27e31718

111
sid.4th
View File

@@ -6,21 +6,22 @@
2DUP 127 AND 84 PC2!
128 OR 84 PC2! ;
\ Voice control register flags
: SID:CTL:GATE 1 ;
: SID:CTL:SYNC3 2 ;
: SID:CTL:RING3 4 ;
: SID:CTL:TEST 8 ;
: SID:CTL:TRI 16 ;
: SID:CTL:SAW 32 ;
: SID:CTL:PWM 64 ;
: SID:CTL:NOISE 128 ;
\ Voice 1
\ Reg 0,1 - frequency voice 1
: SID0/1:FREQ! DUP 255 AND 0 SID! >< 255 AND 1 SID! ;
\ Reg 2,3 - pulse wave duty cycle voice 2
: SID2/3:PWM! DUP 255 AND 2 SID! >< 15 AND 3 SID! ;
\ Reg 4 - control register voice 1
: SID4:GATEOFF 0 ;
: SID4:GATEON 1 ;
: SID4:SYNC3 2 OR ;
: SID4:RING3 4 OR ;
: SID4:TEST 8 OR ;
: SID4:TRI 16 OR ;
: SID4:SAW 32 OR ;
: SID4:PWM 64 OR ;
: SID4:NOISE 128 OR ;
: SID4! 4 SID! ;
\ Reg 5 - attack duration / decay duration voice 1
: SID5:ATK/DEC! 15 AND SWAP 4 LSHIFT OR 5 SID! ;
@@ -33,15 +34,6 @@
\ Reg 9,10 - pulse wave duty cycle voice 2
: SID9/10:PWM! DUP 255 AND 9 SID! >< 255 AND 10 SID! ;
\ Reg 10 - control register voice 2
: SID11:GATEOFF 0 ;
: SID11:GATEON 1 ;
: SID11:SYNC3 2 OR ;
: SID11:RING3 4 OR ;
: SID11:TEST 8 OR ;
: SID11:TRI 16 OR ;
: SID11:SAW 32 OR ;
: SID11:PULSE 64 OR ;
: SID11:NOISE 128 OR ;
: SID11! 11 SID! ;
\ Reg 12 - attack duration / decay duration voice 2
: SID12:ATK/DEC! 15 AND SWAP 4 LSHIFT OR 12 SID! ;
@@ -54,15 +46,6 @@
\ Reg 16,17 - pulse wave duty cycle voice 3
: SID16/17:PWM! DUP 255 AND 16 SID! >< 255 AND 17 SID! ;
\ Reg 18 - control register voice 18
: SID18:GATEOFF 0 ;
: SID18:GATEON 1 ;
: SID18:SYNC3 2 OR ;
: SID18:RING3 4 OR ;
: SID18:TEST 8 OR ;
: SID18:TRI 16 OR ;
: SID18:SAW 32 OR ;
: SID18:PWM 64 OR ;
: SID18:NOISE 128 OR ;
: SID18! 18 SID! ;
\ Reg 19 - attack duration / decay duration voice 3
: SID19:ATK/DEC! 15 AND SWAP 4 LSHIFT OR 19 SID! ;
@@ -89,42 +72,74 @@
\ SID:RST -- Put SID chip in known state
: SID:RST
20000 SID0/1:FREQ! SID4:GATEOFF SID4! 4 2 SID5:ATK/DEC! 15 9 SID6:SUS/REL! 2048 SID2/3:PWM!
20000 SID7/8:FREQ! SID11:GATEOFF SID11! 4 2 SID12:ATK/DEC! 10 9 SID13:SUS/REL! 2048 SID9/10:PWM!
20000 SID14/15:FREQ! SID18:GATEOFF SID18! 4 2 SID19:ATK/DEC! 10 9 SID20:SUS/REL! 2048 SID16/17:PWM!
4389 SID0/1:FREQ! 0 SID4! 4 2 SID5:ATK/DEC! 10 9 SID6:SUS/REL! 2048 SID2/3:PWM!
4389 SID7/8:FREQ! 0 SID11! 4 2 SID12:ATK/DEC! 10 9 SID13:SUS/REL! 2048 SID9/10:PWM!
4389 SID14/15:FREQ! 0 SID18! 4 2 SID19:ATK/DEC! 10 9 SID20:SUS/REL! 2048 SID16/17:PWM!
1024 SID21/22:CUT! 10 SID23:RES SID23!
15 SID24:VOL SID24! ;
\ Frequency table:
: SID:NOTE:C4 4389 ;
: SID:NOTE:C4# 4650 ;
: SID:NOTE:D4 4927 ;
: SID:NOTE:D4# 5220 ;
: SID:NOTE:E4 5530 ;
: SID:NOTE:F4 5859 ;
: SID:NOTE:F4# 6207 ;
: SID:NOTE:G4 6577 ;
: SID:NOTE:G4# 6968 ;
: SID:NOTE:A4 7382 ;
: SID:NOTE:A4# 7821 ;
: SID:NOTE:B4 8286 ;
\ Octave shifts
: SID:OCT:UP 2* ;
: SID:OCT:DOWN 2/ ;
\ Voice contorl registers
VARIABLE SID:V1:CTL
: SID:V1:CTL! SID:V1:CTL ! ;
: SID:V1:NOTE:ON SID0/1:FREQ! SID:V1:CTL @ SID:CTL:GATE OR SID4! ;
: SID:V1:NOTE:OFF SID:V1:CTL @ SID:CTL:GATE INVERT AND SID4! ;
VARIABLE SID:V2:CTL
: SID:V2:CTL! SID:V2:CTL ! ;
: SID:V2:NOTE:ON SID7/8:FREQ! SID:V2:CTL @ SID:CTL:GATE OR SID11! ;
: SID:V2:NOTE:OFF SID:V2:CTL @ SID:CTL:GATE INVERT AND SID11! ;
VARIABLE SID:V3:CTL
: SID:V3:CTL! SID:V3:CTL ! ;
: SID:V3:NOTE:ON SID14/15:FREQ! SID:V3:CTL @ SID:CTL:GATE OR SID18! ;
: SID:V3:NOTE:OFF SID:V3:CTL @ SID:CTL:GATE INVERT AND SID18! ;
: STEP 100 0 DO LOOP ;
: DELAY 10000 0 DO LOOP ;
: SID:TEST:SIREN
SID4:GATEON SID4:TRI SID4!
10 0 DO 255 0 DO I 1 SID! LOOP LOOP
SID4:GATEOFF SID4:TRI SID4! ;
: SIDV1:TEST:NOTE
SID4:GATEON SID4:TRI SID4!
: SID:V1:TEST:NOTE
SID:CTL:TRI SID:V1:CTL!
SID:NOTE:C4 SID:V1:NOTE:ON
DELAY DELAY
SID4:GATEOFF SID4:TRI SID4! ;
: SIDV2:TEST:NOTE
SID11:GATEON SID11:SAW SID11!
SID:V1:NOTE:OFF
: SID:V2:TEST:NOTE
SID:CTL:SAW SID:V2:CTL!
SID:NOTE:D4 SID:V2:NOTE:ON
DELAY DELAY
SID11:GATEOFF SID11:SAW SID11! ;
: SIDV3:TEST:NOTE
SID18:GATEON SID18:PWM SID18!
SID:V2:NOTE:OFF
: SID:V3:TEST:NOTE
SID:CTL:PWM SID:V3:CTL!
SID:NOTE:E4 SID:V3:NOTE:ON
DELAY DELAY
SID18:GATEOFF SID18:PWM SID18! ;
SID:V3:NOTE:OFF
: SID:TEST:MELODY
SIDV1:TEST:NOTE
SIDV2:TEST:NOTE
SIDV3:TEST:NOTE ;
SID:V1:TEST:NOTE
SID:V2:TEST:NOTE
SID:V3:TEST:NOTE ;
: SID:TEST:FILTER
10 SID23:RES SID23:V1 SID23:V2 SID23:V3 SID23:EXT SID23!
SID18:GATEON SID18:PWM SID18!
SID:CTL:PWM SID:V3:CTL! SID:NOTE:D4 SID:V3:NOTE:ON
2047 0 DO I SID21/22:CUT! 1 +LOOP
SID18:GATEOFF SID18:PWM SID18! ;
SID:V3:NOTE:OFF ;
SID:RST