control segment brightness; test pattern
This commit is contained in:
94
src/timer.rs
94
src/timer.rs
@@ -13,55 +13,51 @@ const fn us_to_ticks(us: u32) -> u32 {
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TIMER_FREQ * us / 1_000_000
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}
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// Sets up timer to rise two interrupts:
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// 1. TIMER0_COMPA - segment_switch_us - time in μs to switch to next segment
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// 2. TIMER0_COMPB - segment_on_us - time in μs to keep segment LEDs on
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pub fn segment_timer_init(tc0: TC0, segment_switch_us: u32, segment_on_us: u32) {
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// 16_000_000 / 64 * 1000 / 1_000_000 => 250
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let ocra = us_to_ticks(segment_switch_us);
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let ocrb = us_to_ticks(segment_on_us);
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assert!(
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ocra > ocrb + BUFFER_TICKS,
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"segment_on_us cannot be longer than segment_switch_us - buffer"
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);
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// Timer 0 (8bit)
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pub struct SegmentTimer(TC0);
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// Use CTC mode: reset counter when matches compare value
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tc0.tccr0a.write(|w| w.wgm0().ctc());
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// Set the compare value for TOP (reset)
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tc0.ocr0a.write(|w| {
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w.bits(
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ocra.try_into()
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.expect("timer init segment_switch_us out of rage"),
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)
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});
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// Set the compare value for B match
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tc0.ocr0b.write(|w| {
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w.bits(
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ocrb.try_into()
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.expect("timer init segment_on_us out of rage"),
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)
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});
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// Slow down the timer (CLK / prescale)
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tc0.tccr0b.write(|w| w.cs0().prescale_64());
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// Raise interrupt on TOP (reset)
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// Raise interrupt on B match
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tc0.timsk0
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.write(|w| w.ocie0a().set_bit().ocie0b().set_bit());
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}
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impl SegmentTimer {
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// Sets up timer to rise interrupts:
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// 1. TIMER0_COMPA - segment_switch_us - time in μs to switch to next segment
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// 2. TIMER0_COMPB - set by set_segment_on_time to keep segment LEDs on
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pub fn init(tc0: TC0, segment_switch_us: u32) -> SegmentTimer {
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// 16_000_000 / 64 * 1000 / 1_000_000 => 250
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let ocra = us_to_ticks(segment_switch_us);
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// Set for how long the segment LEDs should be on in μs
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pub fn set_segment_on_time(tc0: TC0, segment_on_us: u32) {
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let ocra = tc0.ocr0a.read().bits();
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let ocrb = us_to_ticks(segment_on_us);
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assert!(
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ocra as u32 > ocrb + BUFFER_TICKS,
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"segment_on_us cannot be longer than segment_switch_us - buffer"
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);
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// Set the compare value for B match
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tc0.ocr0b.write(|w| {
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w.bits(
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ocrb.try_into()
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.expect("timer init segment_on_us out of rage"),
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)
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});
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// Use CTC mode: reset counter when matches compare value
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tc0.tccr0a.write(|w| w.wgm0().ctc());
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// Set the compare value for TOP (reset)
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tc0.ocr0a.write(|w| {
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w.bits(
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ocra.try_into()
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.expect("timer init segment_switch_us out of rage"),
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)
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});
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// Slow down the timer (CLK / prescale)
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tc0.tccr0b.write(|w| w.cs0().prescale_64());
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// Raise interrupt on TOP (reset)
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// Raise interrupt on B match
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tc0.timsk0
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.write(|w| w.ocie0a().set_bit().ocie0b().set_bit());
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SegmentTimer(tc0)
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}
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// Set for how long the segment LEDs should be on in μs
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// Controls TIMER0_COMPB interrupt time after TIMER0_COMPA
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pub fn segment_on_time(&mut self, segment_on_us: u32) {
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let ocra = self.0.ocr0a.read().bits();
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let ocrb = us_to_ticks(segment_on_us);
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assert!(
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ocra as u32 > ocrb + BUFFER_TICKS,
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"segment_on_us cannot be longer than segment_switch_us - buffer"
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);
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// Set the compare value for B match
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self.0.ocr0b.write(|w| {
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w.bits(
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ocrb.try_into()
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.expect("timer init segment_on_us out of rage"),
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)
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});
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}
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}
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