hxd/rc2014-sid
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correct comments and formatting

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Hexa Dust
2025-12-04 20:06:53 +00:00
parent b96983ae06
commit d06e5c404c
1 changed files with 68 additions and 59 deletions
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127
sid.4th
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@@ -1,12 +1,11 @@
\ PS2! c c p-addr -- Data byte (A), high address byte (B), port address (C) - OUT to port with A and B registers set : PC2! ( c c p-addr -- Data byte A, high address byte B, port address C - OUT to port with A and B registers set )
: PC2! SWAP >< OR PC! ; SWAP >< OR PC! ;
\ SID! c c -- Data value, register (0-31); bits 5,6 are for interrupt settings; bit 7 (/CS) is handled : SID! ( c c -- Data value, register 0-31; bits 5,6 are for interrupt settings; bit 7 /CS is handled )
: SID!
2DUP 128 OR 84 PC2! 2DUP 128 OR 84 PC2!
2DUP 127 AND 84 PC2! 2DUP 127 AND 84 PC2!
128 OR 84 PC2! ; 128 OR 84 PC2! ;
\ Voice control register flags ( -- n Voice control register flags )
: SID:CTL:GATE 1 ; : SID:CTL:GATE 1 ;
: SID:CTL:SYNC 2 ; : SID:CTL:SYNC 2 ;
: SID:CTL:RING 4 ; : SID:CTL:RING 4 ;
@@ -16,69 +15,70 @@
: SID:CTL:PWM 64 ; : SID:CTL:PWM 64 ;
: SID:CTL:NOISE 128 ; : SID:CTL:NOISE 128 ;
\ Voice 1 ( Voice 1 )
\ Reg 0,1 - frequency voice 1 : SID0/1:FREQ! ( n -- Reg 0,1 - frequency voice 1 )
: SID0/1:FREQ! DUP 255 AND 0 SID! >< 255 AND 1 SID! ; DUP 255 AND 0 SID! >< 255 AND 1 SID! ;
\ Reg 2,3 - pulse wave duty cycle voice 2 : SID2/3:PWM! ( n -- Reg 2,3 - pulse wave duty cycle voice 2 )
: SID2/3:PWM! DUP 255 AND 2 SID! >< 15 AND 3 SID! ; DUP 255 AND 2 SID! >< 15 AND 3 SID! ;
\ Reg 4 - control register voice 1 : SID4! ( c -- Reg 4 - control register voice 1 )
: SID4! 4 SID! ; 4 SID! ;
\ Reg 5 - attack duration / decay duration voice 1 : SID5:ATK/DEC! ( c -- Reg 5 - attack duration / decay duration voice 1 )
: SID5:ATK/DEC! 15 AND SWAP 4 LSHIFT OR 5 SID! ; 15 AND SWAP 4 LSHIFT OR 5 SID! ;
\ Reg 6 - sustain level / release duration voice 1 : SID6:SUS/REL! ( c -- Reg 6 - sustain level / release duration voice 1 )
: SID6:SUS/REL! 15 AND SWAP 4 LSHIFT OR 6 SID! ; 15 AND SWAP 4 LSHIFT OR 6 SID! ;
\ Voice 2 ( Voice 2 )
\ Reg 7,8 - frequency voice 2 : SID7/8:FREQ! ( n -- Reg 7,8 - frequency voice 2 )
: SID7/8:FREQ! DUP 255 AND 7 SID! >< 15 AND 8 SID! ; DUP 255 AND 7 SID! >< 15 AND 8 SID! ;
\ Reg 9,10 - pulse wave duty cycle voice 2 : SID9/10:PWM! ( n -- Reg 9,10 - pulse wave duty cycle voice 2 )
: SID9/10:PWM! DUP 255 AND 9 SID! >< 255 AND 10 SID! ; DUP 255 AND 9 SID! >< 255 AND 10 SID! ;
\ Reg 10 - control register voice 2 : SID11! ( c -- Reg 10 - control register voice 2 )
: SID11! 11 SID! ; 11 SID! ;
\ Reg 12 - attack duration / decay duration voice 2 : SID12:ATK/DEC! ( c -- Reg 12 - attack duration / decay duration voice 2 )
: SID12:ATK/DEC! 15 AND SWAP 4 LSHIFT OR 12 SID! ; 15 AND SWAP 4 LSHIFT OR 12 SID! ;
\ Reg 13 - sustain level / release duration voice 2 : SID13:SUS/REL! ( c -- Reg 13 - sustain level / release duration voice 2 )
: SID13:SUS/REL! 15 AND SWAP 4 LSHIFT OR 13 SID! ; 15 AND SWAP 4 LSHIFT OR 13 SID! ;
\ Voice 3 ( Voice 3 )
\ Reg 14,15 - frequency voice 3 : SID14/15:FREQ! ( n -- Reg 14,15 - frequency voice 3 )
: SID14/15:FREQ! DUP 255 AND 14 SID! >< 15 AND 15 SID! ; DUP 255 AND 14 SID! >< 15 AND 15 SID! ;
\ Reg 16,17 - pulse wave duty cycle voice 3 : SID16/17:PWM! ( n -- Reg 16,17 - pulse wave duty cycle voice 3 )
: SID16/17:PWM! DUP 255 AND 16 SID! >< 255 AND 17 SID! ; DUP 255 AND 16 SID! >< 255 AND 17 SID! ;
\ Reg 18 - control register voice 18 : SID18! ( c -- Reg 18 - control register voice 18 )
: SID18! 18 SID! ; 18 SID! ;
\ Reg 19 - attack duration / decay duration voice 3 : SID19:ATK/DEC! ( c -- Reg 19 - attack duration / decay duration voice 3 )
: SID19:ATK/DEC! 15 AND SWAP 4 LSHIFT OR 19 SID! ; 15 AND SWAP 4 LSHIFT OR 19 SID! ;
\ Reg 20 - sustain level / release duration voice 3 : SID20:SUS/REL! ( c -- Reg 20 - sustain level / release duration voice 3 )
: SID20:SUS/REL! 15 AND SWAP 4 LSHIFT OR 20 SID! ; 15 AND SWAP 4 LSHIFT OR 20 SID! ;
\ Filters ( Filters )
\ Reg 21/22 - filter cutoff frequency (0 - 2047 / 11 bits) : SID21/22:CUT! ( n -- Reg 21/22 - filter cutoff frequency 0 - 2047 / 11 bits )
: SID21/22:CUT! DUP 7 AND 21 SID! 3 RSHIFT 255 AND 22 SID! ; DUP 7 AND 21 SID! 3 RSHIFT 255 AND 22 SID! ;
\ Reg 23 - filter resonance (0 - 15 / 4 bits) / ext, voice 3, voice 2, voice 1 ( c -- c Reg 23 - filter resonance 0 - 15 / 4 bits, ext, voice 3, voice 2, voice 1 )
: SID23:RES 15 AND 4 LSHIFT ; : SID23:RES 15 AND 4 LSHIFT ;
: SID23:V1 1 OR ; : SID23:V1 1 OR ;
: SID23:V2 2 OR ; : SID23:V2 2 OR ;
: SID23:V3 4 OR ; : SID23:V3 4 OR ;
: SID23:EXT 8 OR ; : SID23:EXT 8 OR ;
: SID23! 23 SID! ; : SID23! ( c -- )
\ Reg 24 - filter mode and main volume control 23 SID! ;
( c -- c Reg 24 - filter mode and main volume control )
: SID24:VOL 15 AND ; : SID24:VOL 15 AND ;
: SID24:LOWPASS 16 OR ; : SID24:LOWPASS 16 OR ;
: SID24:BANDPASS 32 OR ; : SID24:BANDPASS 32 OR ;
: SID24:HIGHPASS 64 OR ; : SID24:HIGHPASS 64 OR ;
: SID24:MUTEVOICE3 128 OR ; : SID24:MUTEVOICE3 128 OR ;
: SID24! 24 SID! ; : SID24! ( c -- )
24 SID! ;
\ SID:RST -- Put SID chip in known state : SID:RST ( -- Put SID chip in known state )
: SID:RST
4389 SID0/1:FREQ! 0 SID4! 4 2 SID5:ATK/DEC! 10 9 SID6:SUS/REL! 2048 SID2/3:PWM! 4389 SID0/1:FREQ! 0 SID4! 4 2 SID5:ATK/DEC! 10 9 SID6:SUS/REL! 2048 SID2/3:PWM!
4389 SID7/8:FREQ! 0 SID11! 4 2 SID12:ATK/DEC! 10 9 SID13:SUS/REL! 2048 SID9/10:PWM! 4389 SID7/8:FREQ! 0 SID11! 4 2 SID12:ATK/DEC! 10 9 SID13:SUS/REL! 2048 SID9/10:PWM!
4389 SID14/15:FREQ! 0 SID18! 4 2 SID19:ATK/DEC! 10 9 SID20:SUS/REL! 2048 SID16/17:PWM! 4389 SID14/15:FREQ! 0 SID18! 4 2 SID19:ATK/DEC! 10 9 SID20:SUS/REL! 2048 SID16/17:PWM!
1024 SID21/22:CUT! 10 SID23:RES SID23! 1024 SID21/22:CUT! 10 SID23:RES SID23!
15 SID24:VOL SID24! ; 15 SID24:VOL SID24! ;
\ Frequency table: ( -- n Frequency table: )
: SID:NOTE:C4 4389 ; : SID:NOTE:C4 4389 ;
: SID:NOTE:C4# 4650 ; : SID:NOTE:C4# 4650 ;
: SID:NOTE:D4 4927 ; : SID:NOTE:D4 4927 ;
@@ -91,25 +91,34 @@
: SID:NOTE:A4 7382 ; : SID:NOTE:A4 7382 ;
: SID:NOTE:A4# 7821 ; : SID:NOTE:A4# 7821 ;
: SID:NOTE:B4 8286 ; : SID:NOTE:B4 8286 ;
\ Octave shifts ( n -- n Octave shifts )
: SID:OCT:UP 2* ; : SID:OCT:UP 2* ;
: SID:OCT:DOWN 2/ ; : SID:OCT:DOWN 2/ ;
\ Voice contorl registers ( Voice contorl registers )
VARIABLE SID:V1:CTL VARIABLE SID:V1:CTL
: SID:V1:CTL! SID:V1:CTL ! ; : SID:V1:CTL! ( c -- Set CTL register for voice 1 )
: SID:V1:NOTE:ON SID0/1:FREQ! SID:V1:CTL @ SID:CTL:GATE OR SID4! ; SID:V1:CTL ! ;
: SID:V1:NOTE:OFF SID:V1:CTL @ SID:CTL:GATE INVERT AND SID4! ; : SID:V1:NOTE:ON ( n -- Start note of given frequency )
SID0/1:FREQ! SID:V1:CTL @ SID:CTL:GATE OR SID4! ;
: SID:V1:NOTE:OFF ( -- Stop note )
SID:V1:CTL @ SID:CTL:GATE INVERT AND SID4! ;
VARIABLE SID:V2:CTL VARIABLE SID:V2:CTL
: SID:V2:CTL! SID:V2:CTL ! ; : SID:V2:CTL! ( c -- Set CTL register for voice 2 )
: SID:V2:NOTE:ON SID7/8:FREQ! SID:V2:CTL @ SID:CTL:GATE OR SID11! ; SID:V2:CTL ! ;
: SID:V2:NOTE:OFF SID:V2:CTL @ SID:CTL:GATE INVERT AND SID11! ; : SID:V2:NOTE:ON ( n -- Start note of given frequency )
SID7/8:FREQ! SID:V2:CTL @ SID:CTL:GATE OR SID11! ;
: SID:V2:NOTE:OFF ( -- Stop note )
SID:V2:CTL @ SID:CTL:GATE INVERT AND SID11! ;
VARIABLE SID:V3:CTL VARIABLE SID:V3:CTL
: SID:V3:CTL! SID:V3:CTL ! ; : SID:V3:CTL! ( c -- Set CTL register for voice 3 )
: SID:V3:NOTE:ON SID14/15:FREQ! SID:V3:CTL @ SID:CTL:GATE OR SID18! ; SID:V3:CTL ! ;
: SID:V3:NOTE:OFF SID:V3:CTL @ SID:CTL:GATE INVERT AND SID18! ; : SID:V3:NOTE:ON ( n -- Start note of given frequency )
SID14/15:FREQ! SID:V3:CTL @ SID:CTL:GATE OR SID18! ;
: SID:V3:NOTE:OFF ( -- Stop note )
SID:V3:CTL @ SID:CTL:GATE INVERT AND SID18! ;
: DELAY 10000 0 DO LOOP ; : DELAY 10000 0 DO LOOP ;