hxd/rc2014-sid
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

SID register words

Browse Source
This commit is contained in:
Hexa Dust
2025-11-06 20:10:48 +00:00
parent a981e8ba74
commit 2279d226d0
1 changed files with 133 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files

145
sid.4th
View File

@@ -1,17 +1,138 @@
\ PS2!   c c p-addr --   Data byte (A), high address byte (B), port address (C) - OUT to port with A and B registers set
\ PS2! c c p-addr -- Data byte (A), high address byte (B), port address (C) - OUT to port with A and B registers set
: PC2! SWAP >< OR PC! ;
\ SIDSEND c c -- Data value, register (0-31); bits 5,6 are for interrupt settings; bit 7 (/CS) is handled
: SIDSEND 2DUP 128 OR 84 PC2! 2DUP 127 AND 84 PC2! 128 OR 84 PC2! ;
\ SIDRST -- Reset SID chip
: SIDRST 0 24 SIDSEND 0 4 SIDSEND ;
: SIDTEST 15 24 SIDSEND 10 0 DO 255 0 DO I 1 SIDSEND LOOP LOOP 0 24 SIDSEND ;
\ SID! c c -- Data value, register (0-31); bits 5,6 are for interrupt settings; bit 7 (/CS) is handled
: SID!
2DUP 128 OR 84 PC2!
2DUP 127 AND 84 PC2!
128 OR 84 PC2! ;
SIDRST
15 24 SIDSEND
0 5 SIDSEND
240 6 SIDSEND
17 4 SIDSEND
\ Voice 1
\ Reg 0,1 - frequency voice 1
: SID0/1:FREQ! DUP 255 AND 0 SID! >< 255 AND 1 SID! ;
\ Reg 2,3 - pulse wave duty cycle voice 2
: SID2/3:PWM! DUP 255 AND 2 SID! >< 15 AND 3 SID! ;
\ Reg 4 - control register voice 1
: SID4:GATEOFF 0 ;
: SID4:GATEON 1 ;
: SID4:SYNC3 2 OR ;
: SID4:RING3 4 OR ;
: SID4:TEST 8 OR ;
: SID4:TRI 16 OR ;
: SID4:SAW 32 OR ;
: SID4:PWM 64 OR ;
: SID4:NOISE 128 OR ;
: SID4! 4 SID! ;
\ Reg 5 - attack duration / decay duration voice 1
: SID5:ATK/DEC! 15 AND SWAP 4 LSHIFT OR 5 SID! ;
\ Reg 6 - sustain level / release duration voice 1
: SID6:SUS/REL! 15 AND SWAP 4 LSHIFT OR 6 SID! ;
SIDTEST
\ Voice 2
\ Reg 7,8 - frequency voice 2
: SID7/8:FREQ! DUP 255 AND 7 SID! >< 15 AND 8 SID! ;
\ Reg 9,10 - pulse wave duty cycle voice 2
: SID9/10:PWM! DUP 255 AND 9 SID! >< 255 AND 10 SID! ;
\ Reg 10 - control register voice 2
: SID11:GATEOFF 0 ;
: SID11:GATEON 1 ;
: SID11:SYNC3 2 OR ;
: SID11:RING3 4 OR ;
: SID11:TEST 8 OR ;
: SID11:TRI 16 OR ;
: SID11:SAW 32 OR ;
: SID11:PULSE 64 OR ;
: SID11:NOISE 128 OR ;
: SID11! 11 SID! ;
\ Reg 12 - attack duration / decay duration voice 2
: SID12:ATK/DEC! 15 AND SWAP 4 LSHIFT OR 12 SID! ;
\ Reg 13 - sustain level / release duration voice 2
: SID13:SUS/REL! 15 AND SWAP 4 LSHIFT OR 13 SID! ;
\ Voice 3
\ Reg 14,15 - frequency voice 3
: SID14/15:FREQ! DUP 255 AND 14 SID! >< 15 AND 15 SID! ;
\ Reg 16,17 - pulse wave duty cycle voice 3
: SID16/17:PWM! DUP 255 AND 16 SID! >< 255 AND 17 SID! ;
\ Reg 18 - control register voice 18
: SID18:GATEOFF 0 ;
: SID18:GATEON 1 ;
: SID18:SYNC3 2 OR ;
: SID18:RING3 4 OR ;
: SID18:TEST 8 OR ;
: SID18:TRI 16 OR ;
: SID18:SAW 32 OR ;
: SID18:PWM 64 OR ;
: SID18:NOISE 128 OR ;
: SID18! 18 SID! ;
\ Reg 19 - attack duration / decay duration voice 3
: SID19:ATK/DEC! 15 AND SWAP 4 LSHIFT OR 19 SID! ;
\ Reg 20 - sustain level / release duration voice 3
: SID20:SUS/REL! 15 AND SWAP 4 LSHIFT OR 20 SID! ;
\ Filters
\ Reg 21/22 - filter cutoff frequency (0 - 2047 / 11 bits)
: SID21/22:CUT! DUP 7 AND 21 SID! 3 RSHIFT 255 AND 22 SID! ;
\ Reg 23 - filter resonance (0 - 15 / 4 bits) / ext, voice 3, voice 2, voice 1
: SID23:RES 15 AND 4 LSHIFT ;
: SID23:V1 1 OR ;
: SID23:V2 2 OR ;
: SID23:V3 4 OR ;
: SID23:EXT 8 OR ;
: SID23! 23 SID! ;
\ Reg 24 - filter mode and main volume control
: SID24:VOL 15 AND ;
: SID24:LOWPASS 16 OR ;
: SID24:BANDPASS 32 OR ;
: SID24:HIGHPASS 64 OR ;
: SID24:MUTEVOICE3 128 OR ;
: SID24! 24 SID! ;
\ SID:RST -- Put SID chip in known state
: SID:RST
20000 SID0/1:FREQ! SID4:GATEOFF SID4! 4 2 SID5:ATK/DEC! 15 9 SID6:SUS/REL! 2048 SID2/3:PWM!
20000 SID7/8:FREQ! SID11:GATEOFF SID11! 4 2 SID12:ATK/DEC! 10 9 SID13:SUS/REL! 2048 SID9/10:PWM!
20000 SID14/15:FREQ! SID18:GATEOFF SID18! 4 2 SID19:ATK/DEC! 10 9 SID20:SUS/REL! 2048 SID16/17:PWM!
1024 SID21/22:CUT! 10 SID23:RES SID23!
15 SID24:VOL SID24! ;
: STEP 100 0 DO LOOP ;
: DELAY 10000 0 DO LOOP ;
: SID:TEST:SIREN
SID4:GATEON SID4:TRI SID4!
10 0 DO 255 0 DO I 1 SID! LOOP LOOP
SID4:GATEOFF SID4:TRI SID4! ;
: SIDV1:TEST:NOTE
SID4:GATEON SID4:TRI SID4!
DELAY DELAY
SID4:GATEOFF SID4:TRI SID4! ;
: SIDV2:TEST:NOTE
SID11:GATEON SID11:SAW SID11!
DELAY DELAY
SID11:GATEOFF SID11:SAW SID11! ;
: SIDV3:TEST:NOTE
SID18:GATEON SID18:PWM SID18!
DELAY DELAY
SID18:GATEOFF SID18:PWM SID18! ;
: SID:TEST:MELODY
SIDV1:TEST:NOTE
SIDV2:TEST:NOTE
SIDV3:TEST:NOTE ;
: SID:TEST:FILTER
10 SID23:RES SID23:V1 SID23:V2 SID23:V3 SID23:EXT SID23!
SID18:GATEON SID18:PWM SID18!
2047 0 DO I SID21/22:CUT! 1 +LOOP
SID18:GATEOFF SID18:PWM SID18! ;
SID:RST
SID:TEST:MELODY
15 SID24:VOL SID24:LOWPASS SID24!
SID:TEST:FILTER
15 SID24:VOL SID24:BANDPASS SID24!
SID:TEST:FILTER
15 SID24:VOL SID24:HIGHPASS SID24!
SID:TEST:FILTER